1. Technical Field
The present invention relates to read circuits for resistor-based memory and, more particularly, to compact, low-power, asynchronous, read circuits for resistor-based memory.
2. Description of the Related Art
There has been increasing interest in resistor-based memory, such as magnetic RAM, phase-change memory, and memristor-based memory. In some systems requiring ultra-low power dissipation, such as neural network computing systems and wireless sensor networks, compact low-power memory read circuits are useful. In such systems, high computing speeds are not required, but the power to read memories should be very low to reduce energy dissipation and to extend battery life. In addition, many such systems operate asynchronously to save power.
Conventional resistor-based memory read circuits, called sense amplifier (S/A) circuits, are not energy efficient. Furthermore, many conventional S/A circuits require a clock signal, which prevents fully asynchronous operation. For example, such S/A circuits include voltage dividers or resistor dividers. However, all of these memory read operation schemes essentially use two clock phases: a precharge phase and a read phase. During the precharge phase, the bitlines are precharged to a certain voltage. During the read phase, the memory cell is connected to the bitlines and the bitline voltage difference caused by the memory cell is sensed and amplified by the memory read circuit. This type of operation is synchronous and needs a clock to function properly, which is unavailable in fully asynchronous systems.
Most existing S/A circuits are based on analog comparators or other types of amplifiers, which are neither compact nor energy efficient. See, for example, the comparator 10 of FIG. 1, which involves the use of many transistor components 12, each drawing power from voltage source 14 to produce an output 16. The high complexity of such analog comparators and their many powered components makes them unsuitable for low-cost, low power, asynchronous circuits. As such, there are no available compact S/A circuits for resistor-based memory which provide low-power, asynchronous operation.